The present invention relates to a wide band signal analyzer, especially, to a wide band signal analyzer suitable for analyzing the frequency domain of a signal under test.
FIG. 1 shows a schematic block diagram of a conventional signal analyzer for analyzing the frequency domain of a signal under test. A frequency converter 10 which has a mixer and a local oscillator etc. converts a signal under test into an IF (Intermediate Frequency) signal. A band pass filter (BPF) 12 makes the IF signal have a suitable bandwidth. An IF amplifier 14 amplifies the output signal of the BPF 12 and an analog to digital converter (ADC) 16 converts it into a digital signal. A digital signal processor (DSP) 18 transforms the output signal of the ADC 16 into the frequency domain data by the FFT process. A memory 20 sequentially stores the frequency domain data.
A trigger detector 21 detects whether the frequency domain data satisfies a predetermined trigger condition or not. That is, the trigger detector 21 compares the data that specify the trigger condition with the frequency domain data of the signal under test and generates a trigger signal if the trigger condition is satisfied. The trigger condition may be specified by an operator selecting a zone in a measuring region on a display screen (not shown), on which the horizontal and vertical axes indicate frequency and amplitude respectively, as the trigger condition.
When the trigger condition is satisfied, a memory controller 23 controls the storage operation of the memory 20 according to the trigger signal generation. In more detail, it can control the time during which the memory 20 continues the storage operation after the time of the trigger generation. If the memory 20 stops the storage operation soon after the trigger signal generation, it is able to store the data received before the time of the trigger signal generation. This operation provides a pre-trigger function. On the other hand, if the memory 20 stops the storage operation after continuing the storage for some period after the trigger signal generation, it stores the data mainly after the time of the trigger signal generation. This provides a post-trigger function. The data stored in the memory 20 in such a way as described above are used to display a waveform of frequency versus amplitude on a suitable display device like a cathode ray tube or a liquid crystal display etc. for frequency domain analysis of the signal. With suitable processing, the data may also be used to create an eye pattern display or a constellation display.
Some modern communication systems use a wider band and operate at a higher speed than before, and instruments using microprocessors, such as personal computers and HDTVs, operate at higher clock frequencies than before. Consequently, it is now desirable that the frequency span of the signal under test be wider. It is, however, difficult for a signal analyzer having the conventional configuration shown in FIG. 1 to realize the wider band analysis. This is because it is necessary to increase the bandwidth of the IF amplifier and the sampling frequency of the ADC in order to increase the bandwidth of the band pass filter. Then it is also necessary to increase the operating speed of the DSP, the data transfer rate and the operating speed of the memory. These measures degrade the performance of the analyzer by making the analyzer sensitive to disturbance or noise etc. and by impairing the spurious response characteristics, i.e. the characteristics where the displayed frequency is not the same as the input frequency, and also increase the cost of the analyzer. It is very difficult to realize the event trigger functions as described above for the wider frequency measurement.
Therefore what is desired is to provide a new type signal analyzer at low cost while reducing the degradation of performance characteristics arising from making the frequency band wider.
What is further desired is to provide a low cost signal analyzer with useful event trigger functions for signal measurement of the wide frequency band.
The present invention provides a wide band signal analyzer suitable for analyzing the frequency domain of a signal under test at low cost while reducing the degradation of performance characteristics.
In an embodiment of the invention, a frequency converter converts a signal under test into an intermediate frequency signal. A narrow band signal processor receives the intermediate frequency signal for producing a first digital signal representing a first frequency band of the intermediate frequency signal. The narrow band signal processor may have a conventional configuration and is used for measuring the narrow band side.
This controls noise caused by the frequency band being wider and keeps the degradation of spurious response characteristics to a minimum.
A wide band signal processor receives the intermediate frequency signal for producing a second digital signal representing a second frequency band, which is wider than the first frequency band and includes the first frequency band. The devices used in both the narrow band and wide band signal processors can be selected to be optimum for the particular band, which is advantageous from technical and economical viewpoints.
A transfer rate decelerator decelerates the transfer rate of the second digital signal so that the following devices do not need to be capable of high speed operation. In a preferred embodiment, a selecting means selects the first digital signal or the output signal of the transfer rate decelerator and a digital processor processes the output signal of the selecting means by some process such as the FFT process. A memory stores the processed output of the digital processor. The data in the memory means can be used for displaying the measurement result or another analysis.
A trigger detector detects whether the output signal of the digital processor satisfies a predetermined trigger condition. A control means controls the transfer rate decelerator according to the output signal of the trigger detector if the measurement frequency band of the signal under test is wider than the first frequency band. In this case, the output signal of the processor is derived from the narrow band signal processor for detecting whether it satisfies the predetermined trigger condition. Therefore the trigger function concerning the wide bandwidth is realized by the slight modification relative to the conventional narrow one.